Journal of Applied Sciences

• Articles • Previous Articles     Next Articles

Hardware/Software Co-verification Environment and Co-Design Method

GAO Gu-gang1,2, SHI Long-Xing1, YANG Jun1   

  1. 1. National ASIC System Engineering Research Center, Southeast University, Nanjing 210096, China
    2.Department of Science and Technology, Jiangsu Police Institute, Nanjing 210012, China
  • Received:2006-09-22 Revised:2007-06-18 Online:2007-09-30 Published:2007-09-30

Abstract: This paper presents a novel SoC co-verification environment based on the C simulation strategy. Using a hardware/software co-verification environment, we propose a hardware/software co-design method for computation-intensive applications. For most important verification issues of co-design, we use a hierarchical verification method. We propose a verification strategy based on a C reference model on the IP level, and co-verification based on C simulation on the system level. The design example of a low cost MPEG-4 decoder SoC is used to show validity of the method

Key words: co-verification, co-design, C/C++, MPEG-4