Journal of Applied Sciences ›› 2009, Vol. 27 ›› Issue (2): 117-123.
• Communication Engineering • Previous Articles Next Articles
Received:
Revised:
Online:
Published:
Abstract:
In this paper, the LDPC codes used in DVB-S2 and WiMAX are analyzed. A universal structure based on cyclic shift matrices is presented for these codes. A partially parallel decoder is designed with a universal storage resource reusing architecture and serial operation processors. This decoder has been implemented on an Altera EP2S60 platform, and can work for 8 064 bit code length at rates 7/8, 6/8, 5/8, 4/8 and 3/8. Test results show that its code throughput can approach 80 Mbit/s.
Key words: low density parity check (LDPC) codes, decoder, cyclic shift matrices
CLC Number:
TN911.22
GUAN Wu, DONG Ming-ke, XIANG Hai-ge. Design of LDPC Coder-Decoder Based on Cyclic Shift Matrices[J]. Journal of Applied Sciences, 2009, 27(2): 117-123.
0 / / Recommend
Add to citation manager EndNote|Reference Manager|ProCite|BibTeX|RefWorks
URL: https://www.jas.shu.edu.cn/EN/
https://www.jas.shu.edu.cn/EN/Y2009/V27/I2/117
