Abstract: Based on serial bus protocol, a remote terminal IP (intellectual property) core for satellite payload data bus is proposed. The IP core is composed of bus interface module, frequency divider module, protocol processing module and data collecting module. The IP core design is tested and verified by functional simulation and FPGA (field programmable gate array) test, and has been taped out successfully. Test results indicate that the designed IP core has good performance in capability, reliability and less resource occupancy. It can be used for testing the payload data bus in satellite systems or in verification equipment of satellite systems.

Key words: communication satellite, payload data bus, IP (intellectual property) core, remote terminal, FPGA (field programmable gate array) test