Journal of Applied Sciences ›› 1998, Vol. 16 ›› Issue (2): 149-156.

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Viterbi Decoding Algorithm and Its FPGA Implementation for K=9 Convolutional Codes

HU AIQUN, PANG KANG, SU JIE   

  1. Southeast University, Nanjing 210096
  • Received:1996-06-29 Revised:1997-03-25 Online:1998-06-30 Published:1998-06-30

Abstract: This paper deals with the error control problem in digital mobile communications. The scheme which employs the maximum likelihood Viterbi algorithm for decoding the K=9 convolutional data is studied. In this scheme, some efficient methods such as the in-place modification operation for path metrics, the saving of path transition and the circle access for path surving are presented. By using these methods, the RAM size needed for saving metrics and paths and the power consumption are decreased. It is shown that the Viterbi algorithm of K=9 whose performance specifications satify the IS-95 standard can be implemented with a single chip FPGA XC4010. The performance is tested, and the implementation consideration is discussed.

Key words: error controlling, digital mobile communications, Viterbi decoding, FPGA implementation