Journal of Applied Sciences ›› 2005, Vol. 23 ›› Issue (3): 274-277.

• Articles • Previous Articles     Next Articles

A New High-Speed and High-Resolution Sample-and-Hold Circuit

CHEN Hong-wei, WU Jian-hui   

  1. Department of Electronic Engineering, Southeast University, Nanjing 210096, China
  • Received:2004-03-12 Revised:2004-05-08 Online:2005-05-31 Published:2005-05-31

Abstract: A new sample-and-hold circuit based on an operational amplifier is described in this paper.It is useful to solve the conflict between speed and DC gain of an amplifier in a high-speed and high-resolution sample-and-hold circuit by using a speed compensation circuit.The circuit was simulated by 0.35 μm CMOS technology.The sample rate is higher than 70 MHz per second and the resolution is 10 bits.

Key words: analog-to-digital converter, sample-and-hold, Op Amp

CLC Number: