Abstract: A scheme to customize capacity of on-chip memory is presented, which establishes relationship between the on-chip memory capacity and the application performance by analyzing the most frequently accessed instructions or data blocks in a specific application.The best capacity is also calculated, and performance changes predicted.Experimental results show that, with the proposed scheme, the best capacity is generally smaller than 4% of the application size, and the performance is significantly improved, doubled on average.

Key words: on-chip memory, best capacity, performance