Journal of Applied Sciences ›› 2005, Vol. 23 ›› Issue (6): 591-594.
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WU Guang-lin, WU Jian-hui, YANG Jun, RAO Jin, LUO Chun
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Abstract: In this paper, various offset-canceling techniques in comparators are reviewed, and high-speed high-resolution comparator design techniques and a new offset canceling technique are then described.The comparator includes three preamplifiers, an output latch and offset canceling circuit.Experimental results show that, after offset adjusting of the comparator, an offset error of about 56.8 μV is achieved, and it is able to resolve 0.1 mv at a comparison rate of 100 MHz under the condition of a single +3.3 supply using Chartered 0.35 μm CMOS technology.
Key words: comparator, amplifier, offset canceling, A/D converter
CLC Number:
TN432
WU Guang-lin, WU Jian-hui, YANG Jun, RAO Jin, LUO Chun. High-Speed High-Resolution Comparator for Design of ADC[J]. Journal of Applied Sciences, 2005, 23(6): 591-594.
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https://www.jas.shu.edu.cn/EN/Y2005/V23/I6/591