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一种改进的内置和式基准电流源的设计

张耀忠 吴建辉 丁家平 龙善丽   

  1. 东南大学 国家专用集成电路系统工程技术研究中心，江苏 南京，210096
  • 收稿日期:2004-09-27 修回日期:2004-12-06 出版日期:2006-01-31 发布日期:2006-01-31

Design of an Improved Current Summing Reference


ZHANG Yao-zhong, WU Jian-hui, DING Jia-ping, LONG Shan-li   

  1. National ASIC System Engineering Center, Southeast University, Nanjing 210096, China
  • Received:2004-09-27 Revised:2004-12-06 Online:2006-01-31 Published:2006-01-31

被引次数

9

摘要： 设计了一种自偏置、共源共栅（cascode）结构的CMOS和式带隙基准电流源电路，用Chart 0.35 μm 5V电压CMOS工艺参数进行了Hspice仿真，结果表明在-40～+85℃温度范围内温度系数为15.2ppm/℃.，电源电压抑制比为-51.8dB。

关键词: 基准电流源, 电流和式, 温度特性, 电源电压抑制比, 自偏置

Abstract:

A CMOS band-gap current summing reference is designed, which is self-biasd with a cascode structure. Hspice simulation with a Chart CMOS 0.35μm and 5V power supply shows that, within ?40?C ~ +85?C, the temperature coefficient is 15.2ppm/?C, and the power supply restrain ratio is ?51.8dB.

Key words:

current reference, current summing, temperature performance, power supply restrain ratio, self-bias