中文

Journal of Applied Sciences ›› 2012, Vol. 30 ›› Issue (3): 306-310.doi: 10.3969/j.issn.0255-8297.2012.03.015

• Electronic Engineering • Previous Articles     Next Articles

High-Speed Arbitrarily Distributed Pseudo-random Number Generator Based on FPGA

LIU Pei-hua1, LU Hua-xiang1, GONG Guo-liang1, LIU Wen-peng1, CHEN Tian-xiang2   

  1. 1. Laboratory of Artificial Neural Networks, Institute of Semiconductors,Chinese Academy of Sciences, Beijing 100083, China
    2. Faculty of Electronic and Electric Engineering, Xiamen University of Technology,Xiamen 361024, Fujian Province, China
  • Received:2010-12-28 Revised:2011-09-03 Online:2012-05-30 Published:2012-05-30

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Abstract:

 Acceptance-rejection is a widely used method to generate arbitrarily distributed pseudo-random numbers from uniformly distributed pseudo-random numbers. This paper proposes a method to improve accepting efficiency. The method transforms samples that are discarded in the original method into acceptable ones to improve efficiency. With the improved acceptance-rejection method, an arbitrarily distributed pseudo-random number generator is designed, which uses a linear feedback shift register to produce uniformly distributed pseudo-random numbers, and then uses the improved acceptance-rejection scheme to generate arbitrarily distributed pseudo-random numbers. The design is implemented on FPGA. The experimental results show that the design has high output efficiency and wide applicability.

Key words: arbitrary distribution random number, improved acceptance-rejection, linear feedback shift register, field programmable gate array (FPGA)

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