Journal of Applied Sciences ›› 2004, Vol. 22 ›› Issue (3): 356-359.
• Articles • Previous Articles Next Articles
RAO Jin, WU Guang-lin, LING Ming, HU Chen
Received:
Revised:
Online:
Published:
Abstract: In this paper, a new built-in self-test approach has been applied to testing on-chip AD converters. A ramp signal is used as test stimulation. This test circuit is capable of measuring the offset, gain, integral nonlinearity(INL), and differential nonlinearity(DNL) errors by testing the low bits of ADC. Simple structure, and high speed are the advantages of the proposed test structure.
Key words: BIST, test algorithm, ADC
CLC Number:
TN45
RAO Jin, WU Guang-lin, LING Ming, HU Chen. An All-Digital BIST Scheme for the ADC Test[J]. Journal of Applied Sciences, 2004, 22(3): 356-359.
0 / / Recommend
Add to citation manager EndNote|Reference Manager|ProCite|BibTeX|RefWorks
URL: https://www.jas.shu.edu.cn/EN/
https://www.jas.shu.edu.cn/EN/Y2004/V22/I3/356