Journal of Applied Sciences ›› 2004, Vol. 22 ›› Issue (3): 356-359.

• Articles • Previous Articles     Next Articles

An All-Digital BIST Scheme for the ADC Test

RAO Jin, WU Guang-lin, LING Ming, HU Chen   

  1. National ASIC System Engineering Center, Southeast University, Nanjing 210096, China
  • Received:2003-06-09 Revised:2003-07-23 Online:2004-09-30 Published:2004-09-30

Abstract: In this paper, a new built-in self-test approach has been applied to testing on-chip AD converters. A ramp signal is used as test stimulation. This test circuit is capable of measuring the offset, gain, integral nonlinearity(INL), and differential nonlinearity(DNL) errors by testing the low bits of ADC. Simple structure, and high speed are the advantages of the proposed test structure.

Key words: BIST, test algorithm, ADC

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