Journal of Applied Sciences ›› 2004, Vol. 22 ›› Issue (4): 475-478.

• Articles • Previous Articles     Next Articles

An 8-bit Successive Approximation ADC Based on a Design for the Testability of the Bluetooth RF Circuit

CHEN Jian, HONG Zhi-liang   

  1. Laboratory of Integrated Circuit Design, Fudan University, Shanghai 200433, China
  • Received:2003-07-02 Revised:2003-09-05 Online:2004-12-31 Published:2004-12-31

Abstract: This paper describes an 8-bit successive approximation ADC based on a design for the testability of the Bluetooth RF circuit. The ADC core is composed of a comparator with a rail-to-rail input range and a DAC with a R-2R structure. The main advantages of the ADC are that it is compact and simple in structure, low in power and small in the area, in this way it can meet the need of design for testability. Furthermore, a test method suitable for Bluetooth RF circuit based on the ADC is also presented. With this method, the function and performance of the Bluetooth RF circuit can be easily tested. The prototype was fabricated using 0.35 μm CMOS technology of TSMC. Its die area is only 0.15 mm~2. The measured results have shown that the circuit has more than 7 bit static resolution under 3.3 V supply voltage and good anti-interference performance in the high frequency has been achieved.

Key words: design for testability, R-2R ladder, rail-to-rail

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