High-Speed Arbitrarily Distributed Pseudo-random Number Generator Based on FPGA
Received date: 2010-12-28
Revised date: 2011-09-03
Online published: 2012-05-30
Acceptance-rejection is a widely used method to generate arbitrarily distributed pseudo-random numbers from uniformly distributed pseudo-random numbers. This paper proposes a method to improve accepting efficiency. The method transforms samples that are discarded in the original method into acceptable ones to improve efficiency. With the improved acceptance-rejection method, an arbitrarily distributed pseudo-random number generator is designed, which uses a linear feedback shift register to produce uniformly distributed pseudo-random numbers, and then uses the improved acceptance-rejection scheme to generate arbitrarily distributed pseudo-random numbers. The design is implemented on FPGA. The experimental results show that the design has high output efficiency and wide applicability.
LIU Pei-hua1, LU Hua-xiang1, GONG Guo-liang1, LIU Wen-peng1, CHEN Tian-xiang2 . High-Speed Arbitrarily Distributed Pseudo-random Number Generator Based on FPGA[J]. Journal of Applied Sciences, 2012 , 30(3) : 306 -310 . DOI: 10.3969/j.issn.0255-8297.2012.03.015
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