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应用科学学报 ›› 2005, Vol. 23 ›› Issue (6): 591-594.

• 论文 • 上一篇    下一篇

一种用于ADC电路的高速高精度比较器设计

吴光林, 吴建辉, 杨军, 饶进, 罗春   

  1. 东南大学国家专用集成电路系统工程技术研究中心, 江苏南京 210096
  • 收稿日期:2004-07-15 修回日期:2004-09-10 出版日期:2005-11-30 发布日期:2005-11-30
  • 作者简介:吴光林(1976-),男,四川渠县人,博士生,E-mail:wglseu@seu.edu.cn
  • 基金资助:
    国家自然科学基金资助项目(60176018)

High-Speed High-Resolution Comparator for Design of ADC

WU Guang-lin, WU Jian-hui, YANG Jun, RAO Jin, LUO Chun   

  1. National ASIC System Engineering Research Center, Southeast University, Nanjing 210096, China
  • Received:2004-07-15 Revised:2004-09-10 Online:2005-11-30 Published:2005-11-30

PDF

152

被引次数

30

摘要： 在分析各种比较器设计失调消除技术基础上,提出了一种用于ADC电路的高速高精度比较器设计技术和失调消除技术.该比较器由主动复位和被动箝位的预放大器和输出锁存器构成,具有失调自动校准功能.仿真结果表明,在Chartered 0.35 μm COMS工艺下,电源电压3.3 V,调整后的比较器失调误差为56.8 μV,比较器的精度0.1mV,比较速率100 MHz.

关键词: A D转换器, 比较器, 失调消除技术, 放大器

Abstract: In this paper, various offset-canceling techniques in comparators are reviewed, and high-speed high-resolution comparator design techniques and a new offset canceling technique are then described.The comparator includes three preamplifiers, an output latch and offset canceling circuit.Experimental results show that, after offset adjusting of the comparator, an offset error of about 56.8 μV is achieved, and it is able to resolve 0.1 mv at a comparison rate of 100 MHz under the condition of a single +3.3 supply using Chartered 0.35 μm CMOS technology.

Key words: comparator, amplifier, offset canceling, A/D converter

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