Abstract: In this paper, a lifting-based recursive algorithm (LRA) is proposed for multi-level discrete wavelet transform (DWT) by interleaving calculation of different level DWT. As an example, we propose an architecture for multi-level 9/7 DWT with lifting scheme by using LRA.It is synthesized and implemented for Altera’s StratixⅡFPGA EP2S60 and can work under a clock frequency of 80 MHz. Performance analysis and comparison results demonstrate that the proposed architecture have good performance in terms of computing time, hardware utilization, and power consumption. Compared to other existing architectures,the hardware utilization of rate is up to 22% higher.

Key words: discrete wavelet transform (DWT), VLSI, lifting, recursive